/*
 * Copyright (c) Huawei Technologies Co., Ltd. 2020-2022. All rights reserved.
 * Description   : RoCE service common API b/w driver and MPU
 * Author        : /
 * Create        : /
 * Notes         : /
 * History       : /
 */

#ifndef ROCE_MPU_CMD_DEFS_H
#define ROCE_MPU_CMD_DEFS_H

#include "mpu_cmd_base_defs.h"
#include "vroce_context_format.h"

#define MAX_ROCE_PHY_PORT 8

/* ********************************** Func cmd between driver and mpu ********************************** */
typedef struct roce_set_func_state_cmd {
    struct comm_info_head head;

    u16 func_id;
    u8 func_en;
    u8 tag;
} roce_set_func_state_cmd_s;

typedef struct roce_get_func_table_cmd {
    struct comm_info_head head;

    u16 func_id;
    u8 rsvd[2];
} roce_get_func_table_cmd_s;

typedef struct roce_get_func_table_rsp {
    struct comm_info_head head;
    u32 func_tbl_value;
} roce_get_func_table_rsp_s;

typedef struct roce_get_cfg_info_cmd {
    struct comm_info_head head;

    u16 func_id;
    u8 rsvd[2];
} roce_get_cfg_info_cmd_s;

typedef struct roce_get_cfg_info_resp {
    struct comm_info_head head;

    u8 scence_id;
    u8 lb_en;
    u8 lb_mode;
    u8 container_mode;

    u8 fake_en;
    u8 pf_start_bit;
    u8 pf_end_bit;
    u8 page_bit;

    u8 port_num;
    u8 host_num;
    u16 rsvd;
} roce_get_cfg_info_resp_s;

typedef struct roce_set_cpu_endian_cmd {
    struct comm_info_head head;

    u16 func_id;
    u8 cpu_endian;
    u8 rsvd;
} roce_set_cpu_endian_cmd_s;

typedef struct roce_cfg_mac_cmd {
    struct comm_info_head head;

    u16 func_id;
    u16 rsvd;
    u16 er_fwd_id;
    u8 mac[6];
    u8 vni_en;
    u32 vlan_id;
} roce_cfg_mac_cmd_s;

typedef struct roce_cfg_ipsu_mac_cmd {
    struct comm_info_head head;

    u16 func_id;
    u8 er_id;
    u8 vni_en; /* vni enable */
    u8 mac[6];
    u8 rsvd[2];
    u32 vlanid_vni;
} roce_cfg_ipsu_mac_cmd_s;

typedef struct vroce_mac_cfg_vni_info {
    struct comm_info_head head;
    u16 func_id;
    u16 rsvd;

    u32 vlan_vni    : 24;
    u32 vni_en      : 8;
} vroce_mac_cfg_vni_info_s;

/* ********************************** Bond cmd between driver and mpu ********************************** */
typedef struct roce_bond_cfg_state_cmd {
    struct comm_info_head head;

    u16 func_id;
    u8 bond_en;
    u8 rsvd;
} roce_bond_cfg_state_cmd_s;

typedef struct roce_bond_set_ipsu_mac_cmd {
    struct comm_info_head head;

    u16 func_id;
    u16 vlan_id;
    u16 er_fwd_id;
    u8 mac[6];
} roce_bond_set_ipsu_mac_cmd_s;

typedef struct roce_bond_cfg_er_fwd_id_cmd {
    struct comm_info_head head;

    u16 func_id;
    u16 er_fwd_id;
    u32 bond_tbl_val;
} roce_bond_cfg_er_fwd_id_cmd_s;

typedef struct roce_bond_combine_er_fwd_id_cmd {
    struct comm_info_head head;
    u16 func_id_src;
    u16 func_id_dst;
    u16 er_fwd_id;
    u8 rsvd[2];
} roce_bond_combine_er_fwd_id_cmd_s;

typedef struct roce_bond_compact_er_fwd_id_cmd {
    struct comm_info_head head;

    u16 func_id;
    u16 rsvd;
    u32 value; /* dw14 value */
} roce_bond_compact_er_fwd_id_cmd_s;

/* ********************************** CC cmd between driver and mpu ********************************** */
typedef struct roce_cc_cfg_param_cmd {
    struct comm_info_head head;
    u16 func_id;
    u16 rsvd;
    u32 param[4];
} roce_cc_cfg_param_cmd_s;

typedef struct roce_cc_cfg_bw_ctrl_cmd {
    struct comm_info_head head;

    u16 func_id;
    u8 cmd;
    u8 rsvd;

    u8 color_type;
    u16 ptype;
    u8 hw_wred_mode;

    u32 cir;
    u32 pir;
    u32 cbs;
    u32 xbs;
    u32 cnp;
    u32 enable;
} roce_cc_cfg_bw_ctrl_cmd_s;

/* ********************************** DFX cmd between driver and mpu and tools ********************************** */
#define ROCE_PORT_NUM_MAX 4
#define ROCE_COS_NUM_MAX 8
#define ROCE_PORT_TRAFFIC_CTR_ID(port, cos) ((((port) << 0x3) + ((cos) & 0x7)) << 1)

typedef struct {
    u64 pkt_bytes;
    u64 pkt_num;
} roce_ctr_bytes_t;

typedef struct roce_ctr_array_bytes {
    roce_ctr_bytes_t tx_cur[ROCE_PORT_NUM_MAX][ROCE_COS_NUM_MAX];
    roce_ctr_bytes_t rx_cur[ROCE_PORT_NUM_MAX][ROCE_COS_NUM_MAX];
} roce_ctr_array_bytes_t;

typedef struct {
    u32 cmd_type;
    u8 port_id;
    u8 cos;
    u8 exec_cos_set;
    u8 exec_port_set;
} roce_port_sta_inbuf_t;

typedef struct {
    struct mgmt_msg_head head;
    roce_ctr_array_bytes_t ctr_array;
    u64 cur_time;
} roce_port_sta_outbuf_t;

/* ********************************** DFX cmd between driver and mpu ********************************** */
typedef struct roce_dfx_cache_out_cmd {
    struct comm_info_head head;

    u16 func_idx;
    u8 cache_index;
    u8 rsvd;
} roce_dfx_cache_out_cmd_s;


typedef struct roce_dfx_cfg_cap_param_cmd {
    struct comm_info_head head;
    u16 index;
    u16 rsvd;
    u32 param[4];
} roce_dfx_cfg_cap_param_cmd_s;

typedef struct roce_dfx_cap_ctr_cmd {
    struct comm_info_head head;
    u16 index;
    u16 rsvd;
    u32 value;
} roce_dfx_cap_ctr_cmd_s;

/* ********************************** migration related cmd between driver and mpu ********************************** */
struct himig_vroce_save_hdr {
    u8 is_vport_valid;
    u8 version_id;           /* initial ver = 10 */
    u16 fun_id;
    u32 num_qps_max_allowed; /* queue count set at add tap */
};

typedef struct roce_save_vf_cc_cmd {
    struct comm_info_head head;
    u16 func_id;
    u16 rsvd;
    u32 param_ldcp[4];
    u32 param_dcqcn[4];
    u32 param_ipqcn[4];
    u32 param_ccf[4];
} roce_save_vf_cc_cmd_s;

struct himig_vroce_save_restore {
    struct himig_vroce_save_hdr hdr;
    struct roce_save_vf_cc_cmd cc;
    roce_cc_cfg_bw_ctrl_cmd_s bw_ctrl;
    u8 mac_info[6];
    u32 vlan_vni : 24;
    u32 vni_en : 8;
    roce_gid_entry_s gid_entry[VROCE_MAX_GID_NUM_PER_PORT];
};

typedef struct roce_set_flow_hung_state_cmd {
    struct comm_info_head head;
    u16 func_id;
    u8 flow_hung;
    u8 rsvd;
} roce_set_flow_hung_state_cmd_s;

#define VROCE_MPU_CACHE_LINE_NUM 8
struct vroce_migrate_get_cache_line {
    struct comm_info_head head;
    u16 func_id;
    u16 cache_line_num;
    vroce_mig_cache_line_s cache_line[VROCE_MPU_CACHE_LINE_NUM];
};

#endif /* ROCE_MPU_CMD_DEFS_H */
